Abstract: this paper examines the single-event latchup (SEL) and single event upset (SEU) response of the Xilinx 7nm XCVC1902 ES1 Versal ACAP Programmable Logic irradiated with neutrons and 64 MeV ...
Abstract: Field-programmable gate array (FPGA) based high performance time-to-digital converters (TDCs) are mainly using a tapped delay line (TDL) for time interpolation. Nearly all the TDLs in ...
This repository contains various small FPGA projects targeting the cheap(-ish) dev board, the Arty A7-35t, made by Digilent. The board has a Xilinx Artix-7 series (XC7A35TICSG324-1L) FPGA. More ...
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